Publications

Publications#

ORCID, Google Scholar

[1]

Isam Vrce, Andreas Kassler, and Gökçe Aydos. Transposable n:m sparse deep reinforcement learning with replay-aware topology control. In Ana Paula Rocha, Mattias Wahde, and H. Jaap van den Herik, editors, Agents and Artificial Intelligence: 18th International Conference, ICAART 2026, Marbella, Spain, March 5–7, 2026, Revised Selected Papers, Lecture Notes in Computer Science. December 2026. Under review.

[2]

Isam Vrce, Andreas Kassler, and Gökçe Aydos. Understanding and stabilizing hardware-aware n:m sparse training in deep reinforcement learning. In Proceedings of the 35th International ACM Conference on Knowledge and Information Management - CIKM. November 2026. Under review.

[3]

Isam Vrce, Andreas Kassler, and Gökçe Aydos. RNM-TD3: N:M Semi-Structured Sparse Reinforcement Learning From Scratch. In Proceedings of the 18th International Conference on Agents and Artificial Intelligence - ICAART. March 2026. URL: https://f.aydos.de/vrce2026rnm-td3.pdf, doi:10.5220/0014489400004052.

[4]

Marius Hobbhahn, Lennart Heim, and Gökçe Aydos. Trends in machine learning hardware. Technical Report, EpochAI, 2023. URL: https://epochai.org/blog/trends-in-machine-learning-hardware.

[5]

Hans Aschauer, Gökçe Aydos, Markus Heintel, and Johannes Zwanzger. Method for operating keystream generators for secure data transmission. 2019. URL: https://worldwide.espacenet.com/patent/search?q=pn%3DUS2022158822A1.

[6]

Markus Heintel, Hans Aschauer, Gökçe Aydos, Rainer Falk, Kai Fischer, Steffen Fries, Wolfgang Klasen, Axel Pfau, and Johannes Zwanzger. Method and device for transmitting a data set from a first to a second device. 2018. URL: https://worldwide.espacenet.com/patent/search?q=pn%3DEP3515033A1.

[7]

Gökçe Aydos. Parity-based Error Detection with Recomputation for Fault-tolerant Spaceborne Computing. PhD thesis, University of Bremen, Germany, 2017. URL: http://nbn-resolving.de/urn:nbn:de:gbv:46-00106056-15.

[8]

Gökçe Aydos and Görschwin Fey. Empirical results on parity-based soft error detection with software-based retry. Microprocessors and Microsystems (MICPRO), September 2016. URL: https://f.aydos.de/aydos2016ltmr_vs_pbed_exper_extended.pdf, doi:10/bsmn.

[9]

Gökçe Aydos and Görschwin Fey. Exploiting error detection latency for parity-based soft error detection. In Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE, April 2016. URL: https://f.aydos.de/aydos2016exploiting_err_det_latency.pdf, doi:10/bsf9.

[10] (1,2)

Gökçe Aydos and Görschwin Fey. Empirical results on parity-based soft error detection with software-based retry. In Nordic Circuits and Systems Conference (NORCAS). IEEE, October 2015. URL: https://f.aydos.de/aydos2015ltmr_vs_pbed_exper.pdf, doi:10/bsmp.

[11]

Gökçe Aydos and Görschwin Fey. Parity-based soft error detection with software-based retry vs. triplication-based soft error correction - an analytical comparison on a flash-based FPGA architecture. In INFORMATIK 2015. GI e.V., September 2015. URL: http://subs.emis.de/LNI/Proceedings/Proceedings246/article129.html.

[12]

Gökçe Aydos and Görschwin Fey. In-circuit error detection with software-based error correction – an alternative to TMR. In Formal Modeling and Verification of Cyber-Physical Systems. Springer, 2015. URL: https://f.aydos.de/aydos2015err_det_based_ft_intro.pdf, doi:10/jqq2.

[13]

Carl Johann Treudler, Jan-Carsten Schröder, Fabian Greif, Kai Stohlmann, Gökçe Aydos, and Görschwin Fey. Scalability of a base level design for an on-board-computer for scientific missions. In Data Systems In Aerospace (DASIA). August 2014. URL: https://articles.adsabs.harvard.edu/pdf/2014ESASP.725E..38T.

[14]

Gökçe Aydos. FPGA-based coincidence-unit for digital positron emission tomography. Master's thesis, RWTH Aachen, 2012. URL: https://f.aydos.de/diploma-thesis.pdf.

Details about my work on error detection-based fault tolerance#

Here you find a summary of research publications on error detection-based fault-tolerance (EDFT) for sequential circuits like processors:

  • The idea came up when I was working on the satellite computer described in [13] which was part of the Eu:CROPIS satellite mission.

  • [12] introduces the idea of EDFT in general.

  • [11] gives a first insight to the performance of EDFT using parity-based error detection by comparing our approach with LTMR analytically. Synthesis results using a real circuit is gathered in [10].

  • [9] tries to improve the timing of EDFT using pipelining.

  • [8] is an extended version of [10] and provides a more detailed specification and fault tolerance analysis of transaction-based processing.

Finally [7] compiles my research work. Dissertation slides includes key diagrams and results of my dissertation.