Credits and license#
The sections chapter discussions and problem set solutions supplement the digital logic course by Clint Cole which is licensed as CC BY-SA 4.0. For some of the problem/project solutions I copied the problem text to aid the understanding of the solutions. The discussion questions and solutions were all written by me.
The course by Cole does not use SystemVerilog so I added discussion questions which augment the compact introduction to SystemVerilog by Zachary Yedida.
The FPGA history is based on the video assay of @Asionometry.
My work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.