Source

Exercise 137

What is a bus?

## Learning Goals#

• Understand the operation of adders, multipliers, subtractors, and comparators;

• Be comfortable designing circuits using structural Verilog.

## Background#

### Bit slice design#

Source

Exercise 138

1. What is the problem with using truth tables for buses?

2. How can we overcome this problem?

Exercise 139

1. What are the pros and cons of bit slicing?

Solution to Exercise 139

1. Bit slicing can be applied to every problem where the problem can be divided to single bit operations. So it is versatile. It may not lead to an optimal solution though.

Source

Exercise 140

1. What is a full adder?

2. What are the inputs and outputs of a full adder?

Exercise 141

What is the motivation for the half adder?

Exercise 142

What is a carry ripple adder?

Exercise 143

#### Designing an adder structurally vs behaviorally#

Exercise 144

How do we design an adder

1. structurally?

2. behaviorally?

### Representing negative binary numbers#

Source

Exercise 145

1. How can we represent negative numbers using binary digits?

2. What are the drawbacks of these representations?

### Subtractors#

Source

#### Ripple Borrow Subtractor#

Exercise 146

How is a (1) half and (2) full subtractor implemented?

Exercise 147

How can we build a subtractor by using an adder?

### Comparator#

Source

Exercise 148

What is a digital comparator and where is it useful?

Exercise 149

How can we implement a digital comparator?

### Multipliers#

Source

Exercise 150

How is a binary multiplier implemented?

### Binary to BCD and BCD to Binary#

Source

Exercise 151

How can we convert a BCD number to a binary number and vice-versa?

TODO