FPGA Programming syllabus#

Implementing digital circuits with Systemverilog

4 SWS, 5 ECTS, in degree program AI Master and as FWP in ET Master

Intended learning outcomes#

The purpose of the course is for you (the student) to learn to:

  • explain the typical structure of FPGAs

  • differentiate a hardware description language from a typical programming language, e.g., regarding structure and purpose

  • use Systemverilog and a state-of-the-art FPGA development tool to develop circuits on an FPGA

  • differentiate between structural and behavioral design approaches

  • analyze behavioral description and write code that implement the behavior

  • classify which data processing tasks are better suited for FPGAs than general processors

  • cooperate in a pair programming setting

  • evaluate someone else’s work and give constructive feedback (e.g., in context of peer-assessed exercises)

Prerequisites#

  • Fundamental programming tools (e.g, control flow, data structures, functions)

  • Digital logic (e.g., transistor, logic gate, K-map, SOP, POS, multiplexer, counter)

The learning materials contain a graceful introduction to digital logic so you can still attend the course if you do not have any experience with digital logic. But expect more workload in this case.

Content (what we do to reach the learning outcomes)#

  • Getting started with the FPGA board

  • Implementation (including testing using testbenches) of:

    • combinational logic, e.g., multiplexer, decoder, shifter, encoder

    • sequential logic, e.g., flip-flop, latch, counter, memory

    • arithmetic circuits, e.g., adder, multiplier

    • state machines

    • a digital system: reaction time monitor

Didactic methods#

To reach the learning outcomes we will use the following didactic methods:

  • Flipped classroom

  • Labs with feedback sessions and pair programming

    During the labs you are encouraged to work with a partner in a pair programming setting. Your partner and the instructor will give you feedback.

  • Mini projects on the FPGA

    Every week there will be problems that you must solve on an FPGA board.

Grading#

Written exam 90 min.

The examination is based on the intended learning outcomes.

Materials#

Additional: