The history of FPGA#
Know where the FPGAs come from
Differentiate FPGAs from PALs, CPLDs and similar predecessors
Understand which factors led to the success of FPGAs
Based on the video essay The History of the FPGA: The Ultimate Flex
What is an FPGA in a single sentence?
Solution to Exercise 168
A digital circuit that can be reprogrammed after manufacturing (which houses more reprogrammable resources than its predecessor programmable logic devices — we will see them in this section.)
How did the engineers prototype digital circuits before FPGAs?
What are the downsides of these approaches?
Solution to Exercise 169
They used TTL chips like 7400-series integrated circuits.
This solution does not scale well for bigger circuits as your prototype may get very large (imagine thousands of 7400 chips) and very power hungry.
Manufacture the chips (as an ASIC).
Manufacturing an ASIC may cost thousands of Euros (as an example refer to Schedules & prices at Europractice IC service), and a months to manufacture. This approach is not feasible for a short design cycle (design, test, fix, test, fix etc).
What were first programmable circuits that can be used to implement combinational and sequential logic?
How do they work?
Solution to Exercise 170
Memory cells combined with AND and OR gates. These have many names probably due to trademark restrictions: programmable logic array, programmable array logic (PAL), field-programmable logic array, generic array logic.
First memory cells were based on programmable read-only memory (PROM). In contrast to ROMs the memory contents of a PROM can be changed after manufacturing through an irreversible process called burning the fuses. Fuses are like one time switches.
Combined with set of AND and OR gates, we can implement combinational logic. Remember that we can implement every digital circuit using AND and OR gates by converting a truth table to minterms or maxterms.
The umbrella term for programmable (or reconfigurable) digital logic components is programmable logic device (PLD). According to Wikipedia the PLDs in increasing complexity are:
Simple programmable logic devices (SPLD)
PLA was programmable both on the AND and OR planes. PAL was an alternative design to PLA. What were the differences?
Solution to Exercise 171
PLAs were unnecessarily flexible and costly (like a puzzle). The inventors of PAL removed the flexibility on the OR plane and introduced sequential logic (like latches and flip-flops) on the output.
Burning the fuses is irreversible. Which technology had improved on this?
Solution to Exercise 172
One of the pioneers of programmable logic is Altera (bought by Intel). Altera’s first product was EP300. It was a PAL based on EPROM. Then Altera came up with CPLD (complex programmable logic device).
What was the improvement of CPLDs (over PALs)?
Which technological advancements led to these improvements?
Solution to Exercise 173
Moore’s law allowed larger AND panes with more inputs (see logic array macrocell in EP300 datasheet), but this caused a slow down due to longer paths, because more inputs and outputs to the AND pane leads to quadratic growth: \(x+y\) vs \(x \cdot y\). The engineers decided to shrink a single PAL, put many PALs in a single chip and interconnect them with programmable wiring channels.
With Moore’s law and CMOS more transistors could be fit into a single chip.
CMOS was not available in US, so Altera went to Japan to manufacture their CPLD.
Ross Freeman was the co-founder of Xilinx and invented the first FPGA. Which belief or dream led him to this invention?
Solution to Exercise 174
In an FPGA many parts may stay unused based on the application and thus would incur unnecessary costs (in a time when chips were expensive). Ross Freeman believed that transistors will be so cheap due to Moore’s law so that unused transistors will be affordable.
The first FPGA is Xilinx XC2064 (later part of XC2000 family). What was FPGA’s improvement over CPLD?
Solution to Exercise 175
The AND pane could not grow because more inputs and outputs to the AND pane leads to quadratic growth: \(x+y\) vs \(x \cdot y\). The engineers decided to get rid of the configurable AND pane altogether and introduced configurable logic blocks (CLB). CLBs use look-up tables instead of AND and OR panes.
CPLDs integrate a non-volatile memory, so they are immediately functional after power-up. Typical modern FPGAs have volatile memory (typically SRAM) and need to be configured after power-up. There are also FPGAs based on non-volatile memory like Microchip ProASIC and IGLOO FPGAs, but these do not offer the logic resources that SRAM-based FPGAs offer and are thus only popular in niche applications like aerospace and military.
The (1) instant functionality after power-up and (2) reduced complexity are distinctive features of CPLDs over modern typical FPGAs.
FPGA and PAL chips were competing with each other back then. What were their differences?
Solution to Exercise 176
They had a similar functionality, but:
FPGAs can scale much better compared to PALs due to faster growing of AND pane compared to the number of inputs and outputs in PALs.
FPGA’s die was much larger, which resulted in a lower yield in chip production. Larger die typically means more difficult to handle which increases the probability for faults and leads to less functional chips.
PAL’s architecture was based on memory cells (PROMs)
PALs were instantly functional after power-up, but the FPGAs required to load their configuration from an external memory
This disadvantage was solved by Actel (bought by Microsemi) by integrating fuses onto the FPGA fabric.
The FPGAs were new, and their tools too (EDA). The tools were difficult to use. The engineers were hesitant to adopt it.
Despite these difficulties, FPGAs took off due to Moore’s law.
What does wire length in an FPGA mean and what is it good for?
Solution to Exercise 177
Wire length is interconnect length.
The configurable logic blocks are typically interconnected with each other to implement a logical function. The longer the wire length, the more complex can be the design.
Which business advancements helped to the success of FPGAs?
Solution to Exercise 178
In the beginning of nineties independent foundries have emerged. This allowed startups to manufacture their own chips without building a semiconductor fab (e.g., Intel has its own fab, but Qualcomm does not).
The independent (pure play) foundries could focus on their business and FPGAs’ large dies motivated them to further improve their processes. Current examples are TSMC and GlobalFoundries which offer semiconductor manufacturing but not no chip design service.
The PAL manufacturers depended on third-party EDA software which caused a problem later. Why?
How did Xilinx deal with this problem?
Solution to Exercise 179
A chip’s capability is limited by the features of the EDA software. If a chip company introduces a new feature in their product to compete against other companies, then this feature should be supported in the EDA software. Otherwise this feature is irrelevant for customers. If the chip company does not control the software, then the company is dependent on EDA software companies.
The dependence of PAL manufacturers on third-party EDA companies led to simple and homogeneous PAL devices across the PAL companies (lowest bottom denominator of features).
On the other hand Xilinx built their own EDA software and could dictate the features.
The author of the essay names the FPGA as the ultimate flex. What could be the reason?
Solution to Exercise 180
(my opinion) Because FPGAs are the most flexible circuits.
From the piece:
This is a picture of Leonard Nemoy. As a marketing ploy, Altera hired him … The reason we got Leonard Nemoy was because Altera’s tag line at the time was “The Logical Alternative”. Obviously playing on his Mr. Spock and being logical.